5.2.1 Linear Shift Register Keystream Generator
One of the simplest methods of generating a pseudo-random sequence is the linear feedback shift register (LFSR) shown in Figure 5.5. The register consists of a series of one-bit memory cells connected in sequence. At each clock cycle, the contents of the register shift one position to the right, and the new bit entering the leftmost cell is formed by the XOR of selected previous bits. These feedback connections are determined by coefficients [C4, C3, C2, C1, C0], which together specify the register’s feedback polynomial. In this example, the key vector is [0,0,1,0,0], yielding an output of 1.
After one clock cycle (Figure 5.6), each bit moves one position to the right, and the XOR of the output and the middle cell is fed back into the leftmost position, producing an output of 0. When the feedback polynomial is primitive, the LFSR generates a maximum-length sequence (m-sequence) of (2n–1) bits before repeating, offering desirable statistical properties for cryptographic and spread-spectrum applications.
